View IDT54FCT543_184709.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

(R)
FAST CMOS OCTAL LATCHED TRANSCEIVER
DESCRIPTION:
IDT54/74FCT543 IDT54/74FCT543A IDT54/74FCT543C
Integrated Device Technology, Inc.
FEATURES:
* * * * * * * * * * * * * IDT54/74FCT543 equivalent to FASTTM speed IDT54/74FCT543A 25% faster than FAST IDT54/74FCT543C 40% faster than FAST Equivalent to FAST output drive over full temperature and voltage supply extremes IOL = 64mA (commercial), 48mA (military) Separate controls for data flow in each direction Back-to-back latches for storage CMOS power levels (1mW typ. static) Substantially lower input current levels than FAST (5A max.) TTL input and output level compatible CMOS output level compatible Product available in Radiation Tolerant and Radiation Enhanced versions Military product compliant to MIL-STD-883, Class B
The IDT54/74FCT543/A/C is a non-inverting octal transceiver built using an advanced dual metal CMOS technology. These devices contain two sets of eight D-type latches with separate input and output controls for each set. For data flow from A to B, for example, the A-to-B Enable (CEAB) input must be LOW in order to enter data from A0-A7 or to take data from B0-B7, as indicated in the Function Table. With CEAB LOW, a LOW signal on the A-to-B Latch Enable (LEAB) input makes the A-to-B latches transparent; a subsequent LOW-to-HIGH transition of the LEAB signal puts the A latches in the storage mode and their outputs no longer change with the A inputs. With CEAB and OEAB both LOW, the 3-state B output buffers are active and reflect the data present at the output of the A latches. Control of data from B to A is similar, but uses the CEBA, LEBA and OEBA inputs.
FUNCTIONAL BLOCK DIAGRAMS
DETAIL A D LE A0 Q D LE Q B0
A1 A2 A3 A4 A5 A6 A7
DETAIL A x 7
B1 B2 B3 B4 B5 B6 B7
OEBA OEAB CEBA LEBA CEAB LEAB
2614 drw 01
The IDT logo is a registered trademark of Integrated Device Technology, Inc. FAST is a registered trademark of National Semiconductor Co.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
(c)1992 Integrated Device Technology, Inc.
MAY 1992
DSC-4602/3
7.17
1
IDT54/74FCT543/A/C FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS IDT54/74FCT861 10-BIT TRANSCEIVERS
LEBA OEBA A0 A1 A2 A3 A4 A5 A6 A7 CEAB GND
1 2 3 4 5 6 7 8 9 10 11 12 24 23 22
INDEX
P24-1, D24-1, SO24-2 & E24-1
21 20 19 18 17 16 15 14 13
A7 CEAB GND NC OEAB LEAB B7
LCC TOP VIEW
Vcc CEBA B0 B1 B2 B3 B4 B5 B6 B7 LEAB OEAB
A0 OEBA LEBA NC Vcc CEBA B0
4 3 2 1 28 27 26 25 24 23 5 6 7 8 9 10
A1 A2 A3 NC A4 A5 A6
L28-1
22 21 20
11 19 12 13 14 15 16 17 18
B1 B2 B3 NC B4 B5 B6
2614 drw 02
DIP/SOIC/CERPACK TOP VIEW
PIN DESCRIPTION
Pin Names Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Enable Input (Active LOW) B-to-A Enable Input (Active LOW) A-to-B Latch Enable Input (Active LOW) B-to-A Latch Enable Input (Active LOW) A-to-B Data Inputs or B-to-A 3-State Outputs B-to-A Data Inputs or A-to-B 3-State Outputs
2614 tbl 02
FUNCTION TABLE (1,2)
For A-to-B (Symmetric with B-to-A)
Inputs Latch Status Output Buffers B0-B7 High Z -- High Z Current A Inputs Previous* A Inputs
OEAB OEBA CEAB CEBA LEAB LEBA
A0-A7 B0-B7
CEAB
H -- -- L L
LEAB
-- H -- L H
OEAB
-- -- H L L
A-to-B Storing Storing -- Transparent Storing
LOGIC SYMBOL
NOTES: 2614 tbl 01 1. * Before LEAB LOW-to-HIGH Transition H = HIGH Voltage Level L = LOW Voltage Level -- = Don't Care or Irrelevant 2. A-to-B data flow shown; B-to-A flow control is the same, except using CEBA, LEBA and OEBA.
LEAB CEAB CEBA LEBA A0 A1 A2 A3 A4 A5 A6 A7 OEBA B0 B1 B2 B3 B4 B5 B6 B7 OEAB
2614 drw 03
7.17
2
IDT54/74FCT543/A/C FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Rating VTERM(2) Terminal Voltage with Respect to GND VTERM(3) Terminal Voltage with Respect to GND TA Operating Temperature TBIAS Temperature Under Bias TSTG Storage Temperature PT Power Dissipation IOUT DC Output Current Commercial Military Unit -0.5 to +7.0 -0.5 to +7.0 V
CAPACITANCE (TA = +25C, f = 1.0MHz)
Symbol CIN CI/O Parameter(1) Input Capacitance I/O Capacitance Conditions Typ. VIN = 0V VOUT = 0V 6 8 Max. 10 12 Unit pF pF
-0.5 to VCC
-0.5 to VCC
V
NOTE: 2614 tbl 04 1. This parameter is guaranteed by characterization data and not tested.
0 to +70 -55 to +125 -55 to +125 0.5 120
-55 to +125 -65 to +135 -65 to +150 0.5 120
C C C W mA
NOTES: 2614 tbl 03 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. No terminal voltage may exceed VCC by +0.5V unless otherwise noted. 2. Inputs and VCC terminals only. 3. Outputs and I/O terminals only.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: VLC = 0.2V, VHC = VCC - 0.2V Commercial: TA = 0C to +70C, VCC = 5.0V 5%; Military: TA = -55C to +125C, VCC = 5.0V 10%
Symbol VIH VIL IIH IIL IIH IIL VIK IOS VOH Parameter Input HIGH Level Input LOW Level Input HIGH Current (Except I/O pins) Input LOW Current (Except I/O pins) Input HIGH Current (I/O pins Only) Input LOW Current (I/O pins Only) Clamp Diode Voltage Short Circuit Current Output HIGH Voltage VCC = Min., IN = -18mA VCC = Max.(3), VO = GND VCC = 3V, VIN = VLC or VHC, IOH = -32A VCC = Min. VIN = VIH or VIL VOL Output LOW Voltage IOH = -300A IOH = -12mA MIL. IOH = -15mA COM'L. VCC = 3V, VIN = VLC or VHC, IOL = 300A VCC = Min. VIN = VIH or VIL IOL = 300A IOL = 48mA MIL.(5) IOL = 64mA COM'L.(5) VCC = Max. Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level VCC = Max. VI = VCC VI = 2.7V VI = 0.5V VI = GND VI = VCC VI = 2.7V VI = 0.5V VI = GND Min. 2.0 -- -- -- -- -- -- -- -- -- -- -60 VHC VHC(4) 2.4 2.4 -- -- -- -- Typ.(2) -- -- -- -- -- -- -- -- -- -- -0.7 -120 VCC VCC 4.3 4.3 GND GND 0.3 0.3 Max. -- 0.8 5 5(4) -5(4) -5 15 15(4) -15(4) -15 -1.2 -- -- -- -- -- VLC VLC(4) 0.55 0.55 V V mA V A A A Unit V V A
NOTES: 2614 tbl 05 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient and maximum loading. 3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second. 4. This parameter is guaranteed but not tested. 5. These are maximum IOL values per output, for 8 outputs turned on simultaneously. Total maximum IOL (all outputs) is 512mA for commercial and 384mA for military. Derate IOL for number of outputs exceeding 8 turned on simultaneously.
7.17
3
IDT54/74FCT543/A/C FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS VLC = 0.2V; VHC = VCC - 0.2V
Symbol ICC ICC ICCD Parameter Quiescent Power Supply Current Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) Test Conditions(1) VCC = Max. VIN VHC; VIN VLC VCC = Max., VIN = 3.4V(3) VCC = Max., Outputs Open VIN VHC VIN VLC Min. -- -- -- Typ.(2) 0.2 0.5 0.15 Max. 1.5 2.0 0.25 Unit mA mA mA/ MHz
CEAB and OEAB = GND CEBA = VCC
One Input Toggling 50% Duty Cycle
IC
Total Power Supply Current(6)
VCC = Max., Outputs Open fCP = 10MHz (LEAB) 50% Duty Cycle CEAB and OEAB = GND CEBA = VCC One Bit Toggling at fi = 5MHz 50% Duty Cycle VCC = Max., Outputs Open fCP = 10MHz (LEAB) 50% Duty Cycle CEAB and OEAB = GND CEBA = VCC Eight Bits Toggling at fi = 5MHz 50% Duty Cycle
VIN VHC VIN VLC (FCT)
--
1.7
4.0
mA
VIN = 3.4V VIN = GND VIN VHC VIN VLC (FCT)
--
2.2
6.0
--
7.0
12.8(5)
VIN = 3.4V VIN = GND
--
9.2
21.8(5)
NOTES: 1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT +IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD(fCP/2 + fiNi) ICC = Quiescent Current ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) fi = Input Frequency Ni = Number of Inputs at fi All currents are in milliamps and all frequencies are in megahertz.
2614 tbl 06
7.17
4
IDT54/74FCT543/A/C FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
IDT54/74FCT543 Com'l. Symbol tPLH tPHL tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tW Parameter Propagation Delay Transparent Mode An to Bn or Bn to An Propagation Delay LEBA to An, LEAB to Bn Output Enable Time OEBA or OEAB to An or Bn CEBA or CEAB to An or Bn Output Disable Time OEBA or OEAB to An or Bn CEBA or CEAB to An or Bn Set-up Time, HIGH or LOW An or Bn to LEBA or LEAB Hold Time, HIGH or LOW An or Bn to LEBA or LEAB Condition CL = 50pF RL = 500
(1)
IDT54/74FCT543A Com'l.
(2)
IDT54/74FCT543C Com'l.
(2)
Mil.
(2)
Mil.
(2)
Mil.
(2)
Min.
(2)
Max. Min.
Max. Min.
Max. Min.
Max. Min.
Max. Min.
Max. Unit
2.5
8.5
2.5
10.0 2.5
6.5
2.5
7.5
2.5
5.3
2.5
6.1
ns
2.5 2.0
12.5 2.5 12.0 2.0
14.0 2.5 14.0 2.0
8.0 9.0
2.5 2.0
9.0 10.0
2.5 2.0
7.0 8.0
2.5 2.0
8.0 9.0
ns ns
2.0
9.0
2.0
13.0 2.0
7.5
2.0
8.5
2.0
6.5
2.0
7.5
ns
3.0 2.0 5.0
-- -- --
3.0 2.0 5.0
-- -- --
2.0 2.0 5.0
-- -- --
2.0 2.0 5.0
-- -- --
2.0 2.0 5.0
-- -- --
2.0 2.0 5.0
-- -- --
ns ns ns
LEBA or LEAB
LOW
Pulse Width
NOTES: 1. See test circuits and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays.
2513 tbl 07
7.17
5
IDT54/74FCT543/A/C FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS TEST CIRCUITS FOR ALL OUTPUTS
VCC 500 VIN Pulse Generator RT D.U.T. 50pF CL 500 V OUT 7.0V
SWITCH POSITION
Test Open Drain Disable Low Enable Low All Other Tests Switch Closed Open
DEFINITIONS: 2614 tbl 08 CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
SET-UP, HOLD AND RELEASE TIMES
DATA INPUT t SU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. t REM 3V 1.5V 0V 3V 1.5V 0V tH 3V 1.5V 0V 3V 1.5V 0V
PULSE WIDTH
LOW-HIGH-LOW PULSE tW HIGH-LOW-HIGH PULSE
1.5V
1.5V
t SU
tH
PROPAGATION DELAY
3V 1.5V tPLH OUTPUT t PLH OPPOSITE PHASE INPUT TRANSITION tPHL 3V 1.5V 0V t PHL 0V VOH 1.5V VOL
ENABLE AND DISABLE TIMES
ENABLE CONTROL INPUT t PZL OUTPUT NORMALLY SWITCH LOW CLOSED t PZH OUTPUT SWITCH NORMALLY OPEN HIGH 3.5V 1.5V 0.3V t PHZ 0.3V 1.5V 0V V OH 0V t PLZ DISABLE 3V 1.5V 0V 3.5V V OL
SAME PHASE INPUT TRANSITION
NOTES 2614 drw 05 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0 MHz; ZO 50; tF 2.5ns; tR 2.5ns.
7.17
6
IDT54/74FCT543/A/C FAST CMOS OCTAL LATCHED TRANSCEIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
ORDERING INFORMATION
IDT XX FCT XXXX Device Type X Package X Process
Temperature Range
Blank B P D L SO E
Commercial MIL-STD-883, Class B Plastic DIP CERDIP Leadless Chip Carrier Small Outline IC CERPACK
543 543A 543C 54 74
Octal Registered Transceiver Fast Octal Registered Transceiver Super Fast Octal Registered Transceiver -55C to +125C 0 to +70C
2614 drw 04
7.17
7

▲Up To Search▲

Price & Availability of IDT54FCT543

	To Download IDT54FCT543 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .